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Top: Computers: Hardware: Components: Processors: TRON:

TRON

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» A Floating-Point VLSI Chip for the TRON Architecture: An Architecture for Reliable Numerical Programming Open in a new browser window - Abstract of paper on Gmicro/FPU (floating-point unit), defines 23 coprocessor instructions; with references, purchase option. [IEEE Micro]
» TRON VLSI CPU Open in a new browser window - CISC 32-bit processor architecture developed to serve as main hardware building block of the realtime TRON Hypernetwork (Highly Functional Distributed System: HFDS), the ultimate goal of the TRON Project.
» The Gmicro/100 32-Bit Microprocessor Open in a new browser window - Abstract of paper on Gmicro/100, 32-bit CISC VLSI, based on TRON specification; with references, purchase option. [IEEE Micro]
» The Gmicro/500 Superscalar Microprocessor with Branch Buffers Open in a new browser window - Abstract of paper on Gmicro/500, with RISC-like dual-pipeline structure to execute basic instructions fast, upward-object-compatible with earlier Gmicro variants; with references, purchase option. [IEEE Micro]


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